commit f6627b09c02365fc4262c15be66d7f2a2b08c735
parent 85150be6ceb5a567a1bff30fd24d660871a6d2fb
Author: Michael Forney <mforney@mforney.org>
Date: Thu, 13 Jun 2013 20:42:47 -0700
Rename i915 -> intel
Diffstat:
| M | Makefile.am | | | 4 | ++-- |
| M | buffer.c | | | 4 | ++-- |
| M | buffer.h | | | 4 | ++-- |
| M | configure.ac | | | 2 | +- |
| D | i915/Makefile.am | | | 14 | -------------- |
| D | i915/batch.c | | | 134 | ------------------------------------------------------------------------------- |
| D | i915/batch.h | | | 62 | -------------------------------------------------------------- |
| D | i915/blt.h | | | 180 | ------------------------------------------------------------------------------- |
| D | i915/bo.c | | | 52 | ---------------------------------------------------- |
| D | i915/bo.h | | | 24 | ------------------------ |
| D | i915/mi.h | | | 97 | ------------------------------------------------------------------------------- |
| A | intel/Makefile.am | | | 14 | ++++++++++++++ |
| A | intel/batch.c | | | 134 | +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
| A | intel/batch.h | | | 62 | ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
| A | intel/blt.h | | | 180 | +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
| A | intel/bo.c | | | 52 | ++++++++++++++++++++++++++++++++++++++++++++++++++++ |
| A | intel/bo.h | | | 24 | ++++++++++++++++++++++++ |
| A | intel/mi.h | | | 97 | +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
| M | renderer.c | | | 12 | ++++++------ |
| M | renderer.h | | | 4 | ++-- |
| M | surface_state.h | | | 4 | ++-- |
21 files changed, 580 insertions(+), 580 deletions(-)
diff --git a/Makefile.am b/Makefile.am
@@ -22,12 +22,12 @@ libswc_la_SOURCES = \
egl.c egl.h
libswc_la_LIBADD = $(wayland_server_LIBS) $(udev_LIBS) $(xkbcommon_LIBS) \
- $(drm_LIBS) $(gbm_LIBS) $(egl_LIBS) $(pixman_LIBS) i915/libi915.la
+ $(drm_LIBS) $(gbm_LIBS) $(egl_LIBS) $(pixman_LIBS) intel/libintel.la
# testclient_SOURCES = \
# testclient.c
#
# testclient_LDADD = $(wayland_client_LIBS)
-SUBDIRS = i915
+SUBDIRS = intel
diff --git a/buffer.c b/buffer.c
@@ -37,7 +37,7 @@ bool swc_buffer_initialize(struct swc_buffer * buffer, struct swc_drm * drm,
printf("width: %u, height: %u, pitch: %u, size: %u\n", width, height, buffer->pitch, size);
- i915_bo_initialize(drm->fd, &buffer->bo, size);
+ intel_bo_initialize(drm->fd, &buffer->bo, size);
if (drmModeAddFB(drm->fd, width, height, 24, 32, buffer->pitch,
buffer->bo.handle, &buffer->id) != 0)
@@ -60,7 +60,7 @@ bool swc_buffer_initialize(struct swc_buffer * buffer, struct swc_drm * drm,
void swc_buffer_finish(struct swc_buffer * buffer, struct swc_drm * drm)
{
drmModeRmFB(drm->fd, buffer->id);
- i915_bo_finalize(drm->fd, &buffer->bo);
+ intel_bo_finalize(drm->fd, &buffer->bo);
}
void swc_buffer_ref_image(struct swc_buffer * buffer, struct swc_drm * drm)
diff --git a/buffer.h b/buffer.h
@@ -2,7 +2,7 @@
#define SWC_BUFFER_H 1
#include "drm.h"
-#include "i915/bo.h"
+#include "intel/bo.h"
#include <stdbool.h>
#include <pixman.h>
@@ -11,7 +11,7 @@ struct swc_buffer
{
uint32_t id;
- struct i915_bo bo;
+ struct intel_bo bo;
/* Pixman image using the mapped buffer for use with SHM. */
pixman_image_t * image;
diff --git a/configure.ac b/configure.ac
@@ -32,6 +32,6 @@ PKG_CHECK_MODULES([wayland_client], [wayland-client])
dnl }}}
#AC_CONFIG_HEADERS([config.h])
-AC_CONFIG_FILES([Makefile i915/Makefile])
+AC_CONFIG_FILES([Makefile intel/Makefile])
AC_OUTPUT
diff --git a/i915/Makefile.am b/i915/Makefile.am
@@ -1,14 +0,0 @@
-# i915/Makefile.am
-
-AM_CFLAGS = $(drm_CFLAGS)
-
-noinst_LTLIBRARIES = libi915.la
-
-libi915_la_SOURCES = \
- bo.c bo.h \
- batch.c batch.h \
- blt.h \
- mi.h
-
-libi915_la_LIBADD = $(drm_LIBS)
-
diff --git a/i915/batch.c b/i915/batch.c
@@ -1,134 +0,0 @@
-#include "batch.h"
-#include "bo.h"
-#include "mi.h"
-
-#include <stdio.h>
-#include <xf86drm.h>
-
-void i915_batch_initialize(struct i915_batch * batch, int drm)
-{
- batch->relocation_count = 0;
- batch->exec_object_count = 0;
- batch->command_count = 0;
- batch->drm = drm;
-}
-
-void i915_batch_flush(struct i915_batch * batch)
-{
- struct i915_bo bo;
- uint32_t index = batch->exec_object_count++;
-
- mi_batch_buffer_end(batch);
-
- /* Pad the batch buffer to the next quad-word. */
- if (batch->command_count & 1)
- mi_noop(batch, false, 0);
-
- printf("command count: %u\n", batch->command_count);
-
- i915_bo_initialize(batch->drm, &bo, batch->command_count << 2);
- i915_bo_write(batch->drm, &bo, 0, batch->commands, batch->command_count << 2);
-
- printf("adding exec object with handle: %u\n", bo.handle);
-
- /* Add command buffer */
- batch->exec_objects[index] = (struct drm_i915_gem_exec_object2) {
- .handle = bo.handle,
- .relocation_count = batch->relocation_count,
- .relocs_ptr = (uint64_t) batch->relocations
- };
-
- {
- int ret;
- struct drm_i915_gem_execbuffer2 execbuffer_arg = {
- .buffers_ptr = (uint64_t) batch->exec_objects,
- .buffer_count = batch->exec_object_count,
- .batch_start_offset = 0, /* XXX: ? */
- .batch_len = batch->command_count << 2,
- .flags = I915_EXEC_RENDER
- };
-
- if ((ret = drmIoctl(batch->drm, DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuffer_arg)) != 0)
- {
- printf("execbuffer failed: %u\n", -ret);
- }
- }
-
- i915_bo_finalize(batch->drm, &bo);
-
- /* Set offsets for all our execution objects (except the last one, our
- * command object). */
- for (index = 0; index < batch->exec_object_count - 1; ++index)
- *batch->offsets[index] = batch->exec_objects[index].offset;
-
- batch->command_count = 0;
- batch->relocation_count = 0;
- batch->exec_object_count = 0;
-}
-
-#if 0
-uint32_t * i915_batch_alloc(struct i915_batch * batch, uint32_t size)
-{
- uint32_t * commands;
-
- if (i915_batch_space(batch) < size)
- i915_batch_flush(batch);
-
- commands = &batch->commands[batch->size];
- batch->command_count += command_count;
-
- return commands;
-}
-#endif
-
-void i915_batch_ensure_space(struct i915_batch * batch, uint32_t size)
-{
- if (i915_batch_space(batch) < size)
- i915_batch_flush(batch);
-}
-
-uint32_t i915_batch_space(struct i915_batch * batch)
-{
- /* XXX: reserved space */
- return I915_MAX_COMMANDS - batch->command_count;
-}
-
-uint64_t i915_batch_add_relocation(struct i915_batch * batch,
- uint32_t batch_offset, struct i915_bo * bo,
- uint32_t read_domains, uint32_t write_domain)
-{
- uint32_t index = batch->relocation_count++;
-
- i915_batch_add_exec_object(batch, bo);
-
- printf("offset: %u\n", (batch->command_count + batch_offset) << 2);
- printf("current: %u\n", *((uint32_t *)(((void *) batch->commands) + ((batch->command_count + batch_offset) << 2))));
-
- batch->relocations[index] = (struct drm_i915_gem_relocation_entry) {
- .target_handle = bo->handle,
- /* XXX: delta */
- /* XXX: offset */
- .offset = (batch->command_count + batch_offset) << 2,
- .presumed_offset = bo->last_offset,
- .read_domains = read_domains,
- .write_domain = write_domain
- };
-
- /* Return our offset guess */
- return bo->last_offset;
-}
-
-void i915_batch_add_exec_object(struct i915_batch * batch, struct i915_bo * bo)
-{
- uint32_t index = batch->exec_object_count++;
-
- printf("adding exec object with handle: %u\n", bo->handle);
-
- batch->exec_objects[index] = (struct drm_i915_gem_exec_object2) {
- .handle = bo->handle
- };
-
- batch->offsets[index] = &bo->last_offset;
-}
-
diff --git a/i915/batch.h b/i915/batch.h
@@ -1,62 +0,0 @@
-#ifndef SWC_I915_BATCH_H
-#define SWC_I915_BATCH_H 1
-
-#include "bo.h"
-
-#include <stdlib.h>
-#include <stdint.h>
-#include <stdarg.h>
-
-#include <libdrm/i915_drm.h>
-
-#define I915_MAX_COMMANDS (1 << 15)
-#define I915_MAX_RELOCATIONS (1 << 11)
-#define I915_MAX_EXEC_OBJECTS (1 << 11)
-
-struct i915_batch
-{
- int drm;
-
- struct drm_i915_gem_relocation_entry relocations[I915_MAX_RELOCATIONS];
- uint64_t * offsets[I915_MAX_RELOCATIONS];
- uint32_t relocation_count;
-
- struct drm_i915_gem_exec_object2 exec_objects[I915_MAX_EXEC_OBJECTS];
- uint32_t exec_object_count;
-
- //uint32_t header[13];
- uint32_t commands[I915_MAX_COMMANDS];
- uint32_t command_count;
-};
-
-void i915_batch_initialize(struct i915_batch * batch, int drm);
-
-void i915_batch_flush(struct i915_batch * batch);
-
-void i915_batch_ensure_space(struct i915_batch * batch, uint32_t size);
-
-uint32_t i915_batch_space(struct i915_batch * batch);
-
-static inline void i915_batch_add_dword(struct i915_batch * batch,
- uint32_t dword)
-{
- batch->commands[batch->command_count++] = dword;
-}
-
-static inline void i915_batch_add_dwords(struct i915_batch * batch, uint32_t count, ...)
-{
- va_list dwords;
- va_start(dwords, count);
- while (count--)
- i915_batch_add_dword(batch, va_arg(dwords, int));
- va_end(dwords);
-}
-
-uint64_t i915_batch_add_relocation(struct i915_batch * batch,
- uint32_t batch_offset, struct i915_bo * bo,
- uint32_t read_domains, uint32_t write_domain);
-
-void i915_batch_add_exec_object(struct i915_batch * batch, struct i915_bo * bo);
-
-#endif
-
diff --git a/i915/blt.h b/i915/blt.h
@@ -1,180 +0,0 @@
-#ifndef SWC_I915_BLT_H
-#define SWC_I915_BLT_H 1
-
-#include "i915/bo.h"
-#include "i915/batch.h"
-
-#define BR00_CLIENT_2D 0x2
-
-#define BR00_OPCODE_XY_COLOR_BLT 0x50
-#define BR00_OPCODE_XY_SRC_COPY_BLT 0x53
-
-#define BR00_32BPP_BYTE_MASK_ALPHA (1 << 1)
-#define BR00_32BPP_BYTE_MASK_COLOR (1 << 2)
-
-static inline uint32_t br00(uint8_t client, uint8_t opcode,
- uint8_t mask_32bpp,
- bool src_tiling_enable, bool dst_tiling_enable,
- uint8_t dword_length)
-{
- return client << 29 /* 31:29 */
- | opcode << 22 /* 28:22 */
- | mask_32bpp << 20 /* 21:20 */
- /* 19:16 */
- | src_tiling_enable << 15 /* 15 */
- /* 14:12 */
- | dst_tiling_enable << 11 /* 11 */
- /* 10:8 */
- | dword_length << 0 /* 7:0 */
- ;
-}
-
-static inline uint32_t br09(uint32_t destination_address)
-{
- /* 31:29 */
- return destination_address << 0 /* 28:0 */
- ;
-}
-
-static inline uint32_t br11(uint16_t source_pitch)
-{
- /* 31:16 */
- return source_pitch << 0 /* 15:0 */
- ;
-}
-
-static inline uint32_t br12(uint32_t source_address)
-{
- /* 31:29 */
- return source_address << 0 /* 28:0 */
- ;
-}
-
-#define BR13_COLOR_DEPTH_8BIT 0x0
-#define BR13_COLOR_DEPTH_16BIT_565 0x1
-#define BR13_COLOR_DEPTH_16BIT_1555 0x2
-#define BR13_COLOR_DEPTH_32BIT 0x3
-
-/* Commonly used raster operations */
-#define BR13_RASTER_OPERATION_SOURCE 0xcc
-#define BR13_RASTER_OPERATION_PATTERN 0xf0
-
-static inline uint32_t br13(bool clipping_enable, uint8_t color_depth,
- uint8_t raster_operation,
- uint16_t destination_pitch)
-{
- /* 31 */
- return clipping_enable << 30 /* 30 */
- /* 29:26 */
- | color_depth << 24 /* 25:24 */
- | raster_operation << 16 /* 23:16 */
- | destination_pitch << 0 /* 15:0 */
- ;
-}
-
-static inline uint32_t br16(uint32_t color)
-{
- return color << 0 /* 31:0 */
- ;
-}
-
-static inline uint32_t br22(uint16_t destination_y1, uint16_t destination_x1)
-{
- return destination_y1 << 16 /* 31:16 */
- | destination_x1 << 0 /* 15:0 */
- ;
-}
-
-static inline uint32_t br23(uint16_t destination_y2, uint16_t destination_x2)
-{
- return destination_y2 << 16 /* 31:16 */
- | destination_x2 << 0 /* 15:0 */
- ;
-}
-
-static inline uint32_t br26(uint16_t source_y1, uint16_t source_x1)
-{
- return source_y1 << 16 /* 31:16 */
- | source_x1 << 16 /* 15:0 */
- ;
-};
-
-static inline void xy_src_copy_blt(struct i915_batch * batch,
- struct i915_bo * src, uint16_t src_pitch,
- uint16_t src_x, uint16_t src_y,
- struct i915_bo * dst, uint16_t dst_pitch,
- uint16_t dst_x, uint16_t dst_y,
- uint16_t width, uint16_t height)
-{
-#if 0
- i915_batch_add_dword(batch,
- uint32_t * commands = i915_batch_alloc(batch, 8);
- commands = (uint32_t *)
- *commands++ = br00(BR00_CLIENT_2D, BR00_OPCODE_XY_SRC_COPY_BLT,
- BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
- false, false, 6);
- *commands++ = br13(false, BR13_COLOR_DEPTH_32BIT,
- BR13_RASTER_OPERATION_SRC,
- dst_pitch);
- *commands++ = br22(dst_y, dst_x);
- *commands++ = br23(dst_y + height, dst_x + width);
- *commands++ = br09(0); /* XXX: dst address */
- *commands++ = br26(src_y, src_x);
- *commands++ = br11(src_pitch);
- *commands++ = br12(0); /* XXX: src address */
-#endif
-
- uint32_t dst_address, src_address;
-
- i915_batch_ensure_space(batch, 8);
-
- dst_address = i915_batch_add_relocation(batch, 4, dst,
- I915_GEM_DOMAIN_RENDER,
- I915_GEM_DOMAIN_RENDER);
- src_address = i915_batch_add_relocation(batch, 7, src,
- I915_GEM_DOMAIN_RENDER, 0);
-
- i915_batch_add_dwords(batch, 8,
- br00(BR00_CLIENT_2D, BR00_OPCODE_XY_SRC_COPY_BLT,
- BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
- false, false, 6),
- br13(false, BR13_COLOR_DEPTH_32BIT, BR13_RASTER_OPERATION_SOURCE,
- dst_pitch),
- br22(dst_y, dst_x),
- br23(dst_y + height, dst_x + width),
- br09(dst_address),
- br26(src_y, src_x),
- br11(src_pitch),
- br12(src_address)
- );
-}
-
-static inline void xy_color_blt(struct i915_batch * batch,
- struct i915_bo * dst, uint16_t dst_pitch,
- uint16_t dst_x, uint16_t dst_y,
- uint16_t width, uint16_t height,
- uint32_t color)
-{
- uint32_t dst_address;
-
- i915_batch_ensure_space(batch, 6);
-
- dst_address = i915_batch_add_relocation(batch, 4, dst,
- I915_GEM_DOMAIN_RENDER,
- I915_GEM_DOMAIN_RENDER);
-
- i915_batch_add_dwords(batch, 6,
- br00(BR00_CLIENT_2D, BR00_OPCODE_XY_COLOR_BLT,
- BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
- false, false, 4),
- br13(false, BR13_COLOR_DEPTH_32BIT, BR13_RASTER_OPERATION_PATTERN,
- dst_pitch),
- br22(dst_y, dst_x),
- br23(dst_y + height, dst_x + width),
- br09(dst_address),
- br16(color)
- );
-}
-
-#endif
-
diff --git a/i915/bo.c b/i915/bo.c
@@ -1,52 +0,0 @@
-#include "bo.h"
-
-#include <stdio.h>
-#include <xf86drm.h>
-#include <libdrm/i915_drm.h>
-
-bool i915_bo_initialize(int drm, struct i915_bo * bo, uint32_t size)
-{
- struct drm_i915_gem_create create_arg = { .size = size };
-
- if (drmCommandWriteRead(drm, DRM_I915_GEM_CREATE, &create_arg,
- sizeof create_arg) != 0)
- {
- printf("could not create bo\n");
- goto error_base;
- }
-
- bo->handle = create_arg.handle;
- bo->size = size;
-
- bo->last_offset = 0;
-
- return true;
-
- error_base:
- return false;
-}
-
-void i915_bo_finalize(int drm, struct i915_bo * bo)
-{
- struct drm_gem_close close_arg = { .handle = bo->handle };
-
- drmIoctl(drm, DRM_IOCTL_GEM_CLOSE, &close_arg);
-}
-
-void i915_bo_write(int drm, struct i915_bo * bo, uint32_t offset,
- void * data, size_t size)
-{
- struct drm_i915_gem_pwrite pwrite_arg = {
- .handle = bo->handle,
- .offset = offset,
- .size = size,
- .data_ptr = (uint64_t) data
- };
-
- if (drmCommandWrite(drm, DRM_I915_GEM_PWRITE, &pwrite_arg,
- sizeof pwrite_arg) != 0)
- {
- printf("write failed\n");
- }
-}
-
diff --git a/i915/bo.h b/i915/bo.h
@@ -1,24 +0,0 @@
-#ifndef SWC_I915_BO_H
-#define SWC_I915_BO_H 1
-
-#include <stdlib.h>
-#include <stdint.h>
-#include <stdbool.h>
-
-struct i915_bo
-{
- uint32_t handle;
- uint32_t size;
-
- uint64_t last_offset;
-};
-
-bool i915_bo_initialize(int drm, struct i915_bo * bo, uint32_t size);
-
-void i915_bo_finalize(int drm, struct i915_bo * bo);
-
-void i915_bo_write(int drm, struct i915_bo * bo, uint32_t offset,
- void * data, size_t size);
-
-#endif
-
diff --git a/i915/mi.h b/i915/mi.h
@@ -1,97 +0,0 @@
-#ifndef SWC_I915_MI_H
-#define SWC_I915_MI_H 1
-
-#include "batch.h"
-
-#include <stdint.h>
-#include <stdbool.h>
-
-#define COMMAND_TYPE_MI 0x0
-
-#define MI_OPCODE_NOOP 0x00
-#define MI_OPCODE_FLUSH 0x04
-#define MI_OPCODE_BATCH_BUFFER_END 0x0A
-#define MI_OPCODE_FLUSH_DW 0x04
-#define MI_OPCODE_BATCH_BUFFER_START 0x31
-
-static inline void mi_noop(struct i915_batch * batch,
- bool identification_number_write_enable,
- uint32_t identification_number)
-{
- i915_batch_add_dword(batch,
- COMMAND_TYPE_MI << 29 /* 31:29 */
- | MI_OPCODE_NOOP << 23 /* 28:23 */
- | identification_number_write_enable << 22 /* 22 */
- | identification_number << 0 /* 21:0 */
- );
-}
-
-static inline void mi_flush(struct i915_batch * batch,
- bool protected_memory_enable,
- bool indirect_state_pointers_disable,
- bool generic_media_state_clear,
- bool global_snapshot_count_reset,
- bool render_cache_flush_inhibit,
- bool state_cache_invalidate)
-{
- i915_batch_add_dword(batch,
- COMMAND_TYPE_MI << 29 /* 31:29 */
- | MI_OPCODE_FLUSH << 23 /* 28:23 */
- /* 22:7 */
- | protected_memory_enable << 6 /* 6 */
- | indirect_state_pointers_disable << 5 /* 5 */
- | generic_media_state_clear << 4 /* 4 */
- | global_snapshot_count_reset << 3 /* 3 */
- | render_cache_flush_inhibit << 2 /* 2 */
- | state_cache_invalidate /* 1 */
- /* 0 */
- );
-}
-
-static inline void mi_flush_dw(struct i915_batch * batch)
-{
- i915_batch_add_dwords(batch, 4,
- COMMAND_TYPE_MI << 29
- | MI_OPCODE_FLUSH_DW << 23
- | 2
- ,
- 0,
- 0,
- 0
- );
-}
-
-static inline void mi_batch_buffer_end(struct i915_batch * batch)
-{
- /* XXX: semaphore data dword / semaphore address */
- i915_batch_add_dword(batch,
- COMMAND_TYPE_MI << 29 /* 31:29 */
- | MI_OPCODE_BATCH_BUFFER_END << 23 /* 28:23 */
- /* 22:0 */
- );
-}
-
-static inline void mi_batch_buffer_start(struct i915_batch * batch,
- bool encrypted_memory_enable,
- bool clear_command_buffer_enable,
- bool buffer_non_secure,
- uint32_t buffer_address)
-{
- i915_batch_ensure_space(batch, 2);
-
- i915_batch_add_dwords(batch, 2,
- COMMAND_TYPE_MI << 29 /* 31:29 */
- | MI_OPCODE_BATCH_BUFFER_START << 23 /* 28:23 */
- /* 22:13 */
- | encrypted_memory_enable << 12 /* 12 */
- | clear_command_buffer_enable << 11 /* 11 */
- /* 10:9 */
- | buffer_non_secure << 8 /* 8 */
- | 0 /* 7:0 */
- ,
- buffer_address
- );
-}
-
-#endif
-
diff --git a/intel/Makefile.am b/intel/Makefile.am
@@ -0,0 +1,14 @@
+# intel/Makefile.am
+
+AM_CFLAGS = $(drm_CFLAGS)
+
+noinst_LTLIBRARIES = libintel.la
+
+libintel_la_SOURCES = \
+ bo.c bo.h \
+ batch.c batch.h \
+ blt.h \
+ mi.h
+
+libintel_la_LIBADD = $(drm_LIBS)
+
diff --git a/intel/batch.c b/intel/batch.c
@@ -0,0 +1,134 @@
+#include "batch.h"
+#include "bo.h"
+#include "mi.h"
+
+#include <stdio.h>
+#include <xf86drm.h>
+
+void intel_batch_initialize(struct intel_batch * batch, int drm)
+{
+ batch->relocation_count = 0;
+ batch->exec_object_count = 0;
+ batch->command_count = 0;
+ batch->drm = drm;
+}
+
+void intel_batch_flush(struct intel_batch * batch)
+{
+ struct intel_bo bo;
+ uint32_t index = batch->exec_object_count++;
+
+ mi_batch_buffer_end(batch);
+
+ /* Pad the batch buffer to the next quad-word. */
+ if (batch->command_count & 1)
+ mi_noop(batch, false, 0);
+
+ printf("command count: %u\n", batch->command_count);
+
+ intel_bo_initialize(batch->drm, &bo, batch->command_count << 2);
+ intel_bo_write(batch->drm, &bo, 0, batch->commands, batch->command_count << 2);
+
+ printf("adding exec object with handle: %u\n", bo.handle);
+
+ /* Add command buffer */
+ batch->exec_objects[index] = (struct drm_i915_gem_exec_object2) {
+ .handle = bo.handle,
+ .relocation_count = batch->relocation_count,
+ .relocs_ptr = (uint64_t) batch->relocations
+ };
+
+ {
+ int ret;
+ struct drm_i915_gem_execbuffer2 execbuffer_arg = {
+ .buffers_ptr = (uint64_t) batch->exec_objects,
+ .buffer_count = batch->exec_object_count,
+ .batch_start_offset = 0, /* XXX: ? */
+ .batch_len = batch->command_count << 2,
+ .flags = I915_EXEC_RENDER
+ };
+
+ if ((ret = drmIoctl(batch->drm, DRM_IOCTL_I915_GEM_EXECBUFFER2,
+ &execbuffer_arg)) != 0)
+ {
+ printf("execbuffer failed: %u\n", -ret);
+ }
+ }
+
+ intel_bo_finalize(batch->drm, &bo);
+
+ /* Set offsets for all our execution objects (except the last one, our
+ * command object). */
+ for (index = 0; index < batch->exec_object_count - 1; ++index)
+ *batch->offsets[index] = batch->exec_objects[index].offset;
+
+ batch->command_count = 0;
+ batch->relocation_count = 0;
+ batch->exec_object_count = 0;
+}
+
+#if 0
+uint32_t * intel_batch_alloc(struct intel_batch * batch, uint32_t size)
+{
+ uint32_t * commands;
+
+ if (intel_batch_space(batch) < size)
+ intel_batch_flush(batch);
+
+ commands = &batch->commands[batch->size];
+ batch->command_count += command_count;
+
+ return commands;
+}
+#endif
+
+void intel_batch_ensure_space(struct intel_batch * batch, uint32_t size)
+{
+ if (intel_batch_space(batch) < size)
+ intel_batch_flush(batch);
+}
+
+uint32_t intel_batch_space(struct intel_batch * batch)
+{
+ /* XXX: reserved space */
+ return I915_MAX_COMMANDS - batch->command_count;
+}
+
+uint64_t intel_batch_add_relocation(struct intel_batch * batch,
+ uint32_t batch_offset, struct intel_bo * bo,
+ uint32_t read_domains, uint32_t write_domain)
+{
+ uint32_t index = batch->relocation_count++;
+
+ intel_batch_add_exec_object(batch, bo);
+
+ printf("offset: %u\n", (batch->command_count + batch_offset) << 2);
+ printf("current: %u\n", *((uint32_t *)(((void *) batch->commands) + ((batch->command_count + batch_offset) << 2))));
+
+ batch->relocations[index] = (struct drm_i915_gem_relocation_entry) {
+ .target_handle = bo->handle,
+ /* XXX: delta */
+ /* XXX: offset */
+ .offset = (batch->command_count + batch_offset) << 2,
+ .presumed_offset = bo->last_offset,
+ .read_domains = read_domains,
+ .write_domain = write_domain
+ };
+
+ /* Return our offset guess */
+ return bo->last_offset;
+}
+
+void intel_batch_add_exec_object(struct intel_batch * batch, struct intel_bo * bo)
+{
+ uint32_t index = batch->exec_object_count++;
+
+ printf("adding exec object with handle: %u\n", bo->handle);
+
+ batch->exec_objects[index] = (struct drm_i915_gem_exec_object2) {
+ .handle = bo->handle
+ };
+
+ batch->offsets[index] = &bo->last_offset;
+}
+
diff --git a/intel/batch.h b/intel/batch.h
@@ -0,0 +1,62 @@
+#ifndef SWC_I915_BATCH_H
+#define SWC_I915_BATCH_H 1
+
+#include "bo.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdarg.h>
+
+#include <libdrm/i915_drm.h>
+
+#define I915_MAX_COMMANDS (1 << 15)
+#define I915_MAX_RELOCATIONS (1 << 11)
+#define I915_MAX_EXEC_OBJECTS (1 << 11)
+
+struct intel_batch
+{
+ int drm;
+
+ struct drm_i915_gem_relocation_entry relocations[I915_MAX_RELOCATIONS];
+ uint64_t * offsets[I915_MAX_RELOCATIONS];
+ uint32_t relocation_count;
+
+ struct drm_i915_gem_exec_object2 exec_objects[I915_MAX_EXEC_OBJECTS];
+ uint32_t exec_object_count;
+
+ //uint32_t header[13];
+ uint32_t commands[I915_MAX_COMMANDS];
+ uint32_t command_count;
+};
+
+void intel_batch_initialize(struct intel_batch * batch, int drm);
+
+void intel_batch_flush(struct intel_batch * batch);
+
+void intel_batch_ensure_space(struct intel_batch * batch, uint32_t size);
+
+uint32_t intel_batch_space(struct intel_batch * batch);
+
+static inline void intel_batch_add_dword(struct intel_batch * batch,
+ uint32_t dword)
+{
+ batch->commands[batch->command_count++] = dword;
+}
+
+static inline void intel_batch_add_dwords(struct intel_batch * batch, uint32_t count, ...)
+{
+ va_list dwords;
+ va_start(dwords, count);
+ while (count--)
+ intel_batch_add_dword(batch, va_arg(dwords, int));
+ va_end(dwords);
+}
+
+uint64_t intel_batch_add_relocation(struct intel_batch * batch,
+ uint32_t batch_offset, struct intel_bo * bo,
+ uint32_t read_domains, uint32_t write_domain);
+
+void intel_batch_add_exec_object(struct intel_batch * batch, struct intel_bo * bo);
+
+#endif
+
diff --git a/intel/blt.h b/intel/blt.h
@@ -0,0 +1,180 @@
+#ifndef SWC_I915_BLT_H
+#define SWC_I915_BLT_H 1
+
+#include "intel/bo.h"
+#include "intel/batch.h"
+
+#define BR00_CLIENT_2D 0x2
+
+#define BR00_OPCODE_XY_COLOR_BLT 0x50
+#define BR00_OPCODE_XY_SRC_COPY_BLT 0x53
+
+#define BR00_32BPP_BYTE_MASK_ALPHA (1 << 1)
+#define BR00_32BPP_BYTE_MASK_COLOR (1 << 2)
+
+static inline uint32_t br00(uint8_t client, uint8_t opcode,
+ uint8_t mask_32bpp,
+ bool src_tiling_enable, bool dst_tiling_enable,
+ uint8_t dword_length)
+{
+ return client << 29 /* 31:29 */
+ | opcode << 22 /* 28:22 */
+ | mask_32bpp << 20 /* 21:20 */
+ /* 19:16 */
+ | src_tiling_enable << 15 /* 15 */
+ /* 14:12 */
+ | dst_tiling_enable << 11 /* 11 */
+ /* 10:8 */
+ | dword_length << 0 /* 7:0 */
+ ;
+}
+
+static inline uint32_t br09(uint32_t destination_address)
+{
+ /* 31:29 */
+ return destination_address << 0 /* 28:0 */
+ ;
+}
+
+static inline uint32_t br11(uint16_t source_pitch)
+{
+ /* 31:16 */
+ return source_pitch << 0 /* 15:0 */
+ ;
+}
+
+static inline uint32_t br12(uint32_t source_address)
+{
+ /* 31:29 */
+ return source_address << 0 /* 28:0 */
+ ;
+}
+
+#define BR13_COLOR_DEPTH_8BIT 0x0
+#define BR13_COLOR_DEPTH_16BIT_565 0x1
+#define BR13_COLOR_DEPTH_16BIT_1555 0x2
+#define BR13_COLOR_DEPTH_32BIT 0x3
+
+/* Commonly used raster operations */
+#define BR13_RASTER_OPERATION_SOURCE 0xcc
+#define BR13_RASTER_OPERATION_PATTERN 0xf0
+
+static inline uint32_t br13(bool clipping_enable, uint8_t color_depth,
+ uint8_t raster_operation,
+ uint16_t destination_pitch)
+{
+ /* 31 */
+ return clipping_enable << 30 /* 30 */
+ /* 29:26 */
+ | color_depth << 24 /* 25:24 */
+ | raster_operation << 16 /* 23:16 */
+ | destination_pitch << 0 /* 15:0 */
+ ;
+}
+
+static inline uint32_t br16(uint32_t color)
+{
+ return color << 0 /* 31:0 */
+ ;
+}
+
+static inline uint32_t br22(uint16_t destination_y1, uint16_t destination_x1)
+{
+ return destination_y1 << 16 /* 31:16 */
+ | destination_x1 << 0 /* 15:0 */
+ ;
+}
+
+static inline uint32_t br23(uint16_t destination_y2, uint16_t destination_x2)
+{
+ return destination_y2 << 16 /* 31:16 */
+ | destination_x2 << 0 /* 15:0 */
+ ;
+}
+
+static inline uint32_t br26(uint16_t source_y1, uint16_t source_x1)
+{
+ return source_y1 << 16 /* 31:16 */
+ | source_x1 << 16 /* 15:0 */
+ ;
+};
+
+static inline void xy_src_copy_blt(struct intel_batch * batch,
+ struct intel_bo * src, uint16_t src_pitch,
+ uint16_t src_x, uint16_t src_y,
+ struct intel_bo * dst, uint16_t dst_pitch,
+ uint16_t dst_x, uint16_t dst_y,
+ uint16_t width, uint16_t height)
+{
+#if 0
+ intel_batch_add_dword(batch,
+ uint32_t * commands = intel_batch_alloc(batch, 8);
+ commands = (uint32_t *)
+ *commands++ = br00(BR00_CLIENT_2D, BR00_OPCODE_XY_SRC_COPY_BLT,
+ BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
+ false, false, 6);
+ *commands++ = br13(false, BR13_COLOR_DEPTH_32BIT,
+ BR13_RASTER_OPERATION_SRC,
+ dst_pitch);
+ *commands++ = br22(dst_y, dst_x);
+ *commands++ = br23(dst_y + height, dst_x + width);
+ *commands++ = br09(0); /* XXX: dst address */
+ *commands++ = br26(src_y, src_x);
+ *commands++ = br11(src_pitch);
+ *commands++ = br12(0); /* XXX: src address */
+#endif
+
+ uint32_t dst_address, src_address;
+
+ intel_batch_ensure_space(batch, 8);
+
+ dst_address = intel_batch_add_relocation(batch, 4, dst,
+ I915_GEM_DOMAIN_RENDER,
+ I915_GEM_DOMAIN_RENDER);
+ src_address = intel_batch_add_relocation(batch, 7, src,
+ I915_GEM_DOMAIN_RENDER, 0);
+
+ intel_batch_add_dwords(batch, 8,
+ br00(BR00_CLIENT_2D, BR00_OPCODE_XY_SRC_COPY_BLT,
+ BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
+ false, false, 6),
+ br13(false, BR13_COLOR_DEPTH_32BIT, BR13_RASTER_OPERATION_SOURCE,
+ dst_pitch),
+ br22(dst_y, dst_x),
+ br23(dst_y + height, dst_x + width),
+ br09(dst_address),
+ br26(src_y, src_x),
+ br11(src_pitch),
+ br12(src_address)
+ );
+}
+
+static inline void xy_color_blt(struct intel_batch * batch,
+ struct intel_bo * dst, uint16_t dst_pitch,
+ uint16_t dst_x, uint16_t dst_y,
+ uint16_t width, uint16_t height,
+ uint32_t color)
+{
+ uint32_t dst_address;
+
+ intel_batch_ensure_space(batch, 6);
+
+ dst_address = intel_batch_add_relocation(batch, 4, dst,
+ I915_GEM_DOMAIN_RENDER,
+ I915_GEM_DOMAIN_RENDER);
+
+ intel_batch_add_dwords(batch, 6,
+ br00(BR00_CLIENT_2D, BR00_OPCODE_XY_COLOR_BLT,
+ BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
+ false, false, 4),
+ br13(false, BR13_COLOR_DEPTH_32BIT, BR13_RASTER_OPERATION_PATTERN,
+ dst_pitch),
+ br22(dst_y, dst_x),
+ br23(dst_y + height, dst_x + width),
+ br09(dst_address),
+ br16(color)
+ );
+}
+
+#endif
+
diff --git a/intel/bo.c b/intel/bo.c
@@ -0,0 +1,52 @@
+#include "bo.h"
+
+#include <stdio.h>
+#include <xf86drm.h>
+#include <libdrm/i915_drm.h>
+
+bool intel_bo_initialize(int drm, struct intel_bo * bo, uint32_t size)
+{
+ struct drm_i915_gem_create create_arg = { .size = size };
+
+ if (drmCommandWriteRead(drm, DRM_I915_GEM_CREATE, &create_arg,
+ sizeof create_arg) != 0)
+ {
+ printf("could not create bo\n");
+ goto error_base;
+ }
+
+ bo->handle = create_arg.handle;
+ bo->size = size;
+
+ bo->last_offset = 0;
+
+ return true;
+
+ error_base:
+ return false;
+}
+
+void intel_bo_finalize(int drm, struct intel_bo * bo)
+{
+ struct drm_gem_close close_arg = { .handle = bo->handle };
+
+ drmIoctl(drm, DRM_IOCTL_GEM_CLOSE, &close_arg);
+}
+
+void intel_bo_write(int drm, struct intel_bo * bo, uint32_t offset,
+ void * data, size_t size)
+{
+ struct drm_i915_gem_pwrite pwrite_arg = {
+ .handle = bo->handle,
+ .offset = offset,
+ .size = size,
+ .data_ptr = (uint64_t) data
+ };
+
+ if (drmCommandWrite(drm, DRM_I915_GEM_PWRITE, &pwrite_arg,
+ sizeof pwrite_arg) != 0)
+ {
+ printf("write failed\n");
+ }
+}
+
diff --git a/intel/bo.h b/intel/bo.h
@@ -0,0 +1,24 @@
+#ifndef SWC_I915_BO_H
+#define SWC_I915_BO_H 1
+
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+struct intel_bo
+{
+ uint32_t handle;
+ uint32_t size;
+
+ uint64_t last_offset;
+};
+
+bool intel_bo_initialize(int drm, struct intel_bo * bo, uint32_t size);
+
+void intel_bo_finalize(int drm, struct intel_bo * bo);
+
+void intel_bo_write(int drm, struct intel_bo * bo, uint32_t offset,
+ void * data, size_t size);
+
+#endif
+
diff --git a/intel/mi.h b/intel/mi.h
@@ -0,0 +1,97 @@
+#ifndef SWC_I915_MI_H
+#define SWC_I915_MI_H 1
+
+#include "batch.h"
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#define COMMAND_TYPE_MI 0x0
+
+#define MI_OPCODE_NOOP 0x00
+#define MI_OPCODE_FLUSH 0x04
+#define MI_OPCODE_BATCH_BUFFER_END 0x0A
+#define MI_OPCODE_FLUSH_DW 0x04
+#define MI_OPCODE_BATCH_BUFFER_START 0x31
+
+static inline void mi_noop(struct intel_batch * batch,
+ bool identification_number_write_enable,
+ uint32_t identification_number)
+{
+ intel_batch_add_dword(batch,
+ COMMAND_TYPE_MI << 29 /* 31:29 */
+ | MI_OPCODE_NOOP << 23 /* 28:23 */
+ | identification_number_write_enable << 22 /* 22 */
+ | identification_number << 0 /* 21:0 */
+ );
+}
+
+static inline void mi_flush(struct intel_batch * batch,
+ bool protected_memory_enable,
+ bool indirect_state_pointers_disable,
+ bool generic_media_state_clear,
+ bool global_snapshot_count_reset,
+ bool render_cache_flush_inhibit,
+ bool state_cache_invalidate)
+{
+ intel_batch_add_dword(batch,
+ COMMAND_TYPE_MI << 29 /* 31:29 */
+ | MI_OPCODE_FLUSH << 23 /* 28:23 */
+ /* 22:7 */
+ | protected_memory_enable << 6 /* 6 */
+ | indirect_state_pointers_disable << 5 /* 5 */
+ | generic_media_state_clear << 4 /* 4 */
+ | global_snapshot_count_reset << 3 /* 3 */
+ | render_cache_flush_inhibit << 2 /* 2 */
+ | state_cache_invalidate /* 1 */
+ /* 0 */
+ );
+}
+
+static inline void mi_flush_dw(struct intel_batch * batch)
+{
+ intel_batch_add_dwords(batch, 4,
+ COMMAND_TYPE_MI << 29
+ | MI_OPCODE_FLUSH_DW << 23
+ | 2
+ ,
+ 0,
+ 0,
+ 0
+ );
+}
+
+static inline void mi_batch_buffer_end(struct intel_batch * batch)
+{
+ /* XXX: semaphore data dword / semaphore address */
+ intel_batch_add_dword(batch,
+ COMMAND_TYPE_MI << 29 /* 31:29 */
+ | MI_OPCODE_BATCH_BUFFER_END << 23 /* 28:23 */
+ /* 22:0 */
+ );
+}
+
+static inline void mi_batch_buffer_start(struct intel_batch * batch,
+ bool encrypted_memory_enable,
+ bool clear_command_buffer_enable,
+ bool buffer_non_secure,
+ uint32_t buffer_address)
+{
+ intel_batch_ensure_space(batch, 2);
+
+ intel_batch_add_dwords(batch, 2,
+ COMMAND_TYPE_MI << 29 /* 31:29 */
+ | MI_OPCODE_BATCH_BUFFER_START << 23 /* 28:23 */
+ /* 22:13 */
+ | encrypted_memory_enable << 12 /* 12 */
+ | clear_command_buffer_enable << 11 /* 11 */
+ /* 10:9 */
+ | buffer_non_secure << 8 /* 8 */
+ | 0 /* 7:0 */
+ ,
+ buffer_address
+ );
+}
+
+#endif
+
diff --git a/renderer.c b/renderer.c
@@ -1,6 +1,6 @@
#include "renderer.h"
-#include "i915/blt.h"
-#include "i915/mi.h"
+#include "intel/blt.h"
+#include "intel/mi.h"
#include <stdio.h>
#include <GLES2/gl2.h>
@@ -77,7 +77,7 @@ static void repaint_surface_for_output(struct swc_renderer * renderer,
else
{
/*
- struct i915_bo * src = &surface->renderer_state.drm.bo;
+ struct intel_bo * src = &surface->renderer_state.drm.bo;
uint32_t src_pitch = surface->renderer_state.drm.pitch;
xy_src_copy_blt(&renderer->batch, src, src_pitch, 0, 0,
@@ -92,7 +92,7 @@ bool swc_renderer_initialize(struct swc_renderer * renderer,
{
renderer->drm = drm;
- i915_batch_initialize(&renderer->batch, drm->fd);
+ intel_batch_initialize(&renderer->batch, drm->fd);
return true;
}
@@ -123,7 +123,7 @@ void swc_renderer_repaint_output(struct swc_renderer * renderer,
//mi_flush(&renderer->batch, false, false, false, false, false, false);
- i915_batch_flush(&renderer->batch);
+ intel_batch_flush(&renderer->batch);
}
void swc_renderer_attach(struct swc_renderer * renderer,
@@ -159,7 +159,7 @@ void swc_renderer_attach(struct swc_renderer * renderer,
struct intel_region * region = image->region;
drm_intel_bo * bo = region->bo;
- surface->renderer_state.drm.bo = (struct i915_bo) {
+ surface->renderer_state.drm.bo = (struct intel_bo) {
.handle = bo->handle
};
diff --git a/renderer.h b/renderer.h
@@ -4,13 +4,13 @@
#include "output.h"
#include "surface.h"
#include "drm.h"
-#include "i915/batch.h"
+#include "intel/batch.h"
struct swc_renderer
{
struct swc_drm * drm;
- struct i915_batch batch;
+ struct intel_batch batch;
};
bool swc_renderer_initialize(struct swc_renderer * renderer,
diff --git a/surface_state.h b/surface_state.h
@@ -1,7 +1,7 @@
#ifndef SWC_SURFACE_STATE_H
#define SWC_SURFACE_STATE_H 1
-#include "i915/bo.h"
+#include "intel/bo.h"
#include <wayland-server.h>
#include <pixman.h>
@@ -14,7 +14,7 @@ union swc_renderer_surface_state
} shm;
struct
{
- struct i915_bo bo;
+ struct intel_bo bo;
uint32_t pitch;
} drm;
};
