commit cfc3346087cedfe81796f5b05a4e1146f8e6022b
parent 27f27f19ddf850d5e20ee58cd8f6d970efe90254
Author: Michael Forney <mforney@mforney.org>
Date: Fri, 14 Jun 2013 02:52:35 -0700
Use intel_bufmgr for buffer management
Diffstat:
13 files changed, 192 insertions(+), 344 deletions(-)
diff --git a/Makefile.am b/Makefile.am
@@ -27,7 +27,8 @@ libswc_la_SOURCES = \
egl.c egl.h
libswc_la_LIBADD = $(wayland_server_LIBS) $(udev_LIBS) $(xkbcommon_LIBS) \
- $(drm_LIBS) $(gbm_LIBS) $(egl_LIBS) $(pixman_LIBS) intel/libintel.la
+ $(drm_LIBS) $(drm_intel_LIBS) $(gbm_LIBS) $(egl_LIBS) $(pixman_LIBS) \
+ intel/libintel.la
# testclient_SOURCES = \
# testclient.c
diff --git a/buffer.c b/buffer.c
@@ -6,41 +6,23 @@
#include <xf86drm.h>
#include <xf86drmMode.h>
-/* Returns the next multiple of the eth power of 2 */
-static inline uint32_t next_multiple_power_2(uint32_t n, uint32_t e)
-{
- return (n + (1 << e) - 1) & ~((1 << e) - 1);
-}
-
-static void destroy_image(pixman_image_t * image, void * data)
-{
- struct swc_buffer * buffer = data;
-
- munmap(pixman_image_get_data(image), buffer->bo.size);
-}
-
bool swc_buffer_initialize(struct swc_buffer * buffer, struct swc_drm * drm,
uint32_t width, uint32_t height)
{
uint32_t size;
-
- buffer->image = NULL;
+ uint32_t tiling_mode = I915_TILING_X;
+ unsigned long pitch;
buffer->width = width;
buffer->height = height;
- /* Round width up to next multiple of 512 */
- buffer->pitch = next_multiple_power_2(width * 4, 9);
-
- /* Round height up to next multiple of 4 */
- size = buffer->pitch * next_multiple_power_2(height, 2);
+ buffer->bo = drm_intel_bo_alloc_tiled(drm->bufmgr, "fb", width, height, 4,
+ &tiling_mode, &pitch, 0);
- printf("width: %u, height: %u, pitch: %u, size: %u\n", width, height, buffer->pitch, size);
-
- intel_bo_initialize(drm->fd, &buffer->bo, size);
+ buffer->pitch = pitch;
if (drmModeAddFB(drm->fd, width, height, 24, 32, buffer->pitch,
- buffer->bo.handle, &buffer->id) != 0)
+ buffer->bo->handle, &buffer->id) != 0)
{
printf("could not create FB from buffer handle\n");
goto error_buffer;
@@ -49,10 +31,7 @@ bool swc_buffer_initialize(struct swc_buffer * buffer, struct swc_drm * drm,
return true;
error_buffer:
- {
- struct drm_gem_close close_arg = { .handle = buffer->bo.handle };
- drmIoctl(drm->fd, DRM_IOCTL_GEM_CLOSE, &close_arg);
- }
+ drm_intel_bo_unreference(buffer->bo);
error_base:
return false;
}
@@ -60,39 +39,6 @@ bool swc_buffer_initialize(struct swc_buffer * buffer, struct swc_drm * drm,
void swc_buffer_finish(struct swc_buffer * buffer, struct swc_drm * drm)
{
drmModeRmFB(drm->fd, buffer->id);
- intel_bo_finalize(drm->fd, &buffer->bo);
-}
-
-void swc_buffer_ref_image(struct swc_buffer * buffer, struct swc_drm * drm)
-{
- if (!buffer->image)
- {
- uint32_t * data;
- struct drm_i915_gem_mmap mmap_arg = {
- .handle = buffer->bo.handle,
- .size = buffer->bo.size
- };
-
- if (drmCommandWriteRead(drm->fd, DRM_I915_GEM_MMAP, &mmap_arg,
- sizeof mmap_arg) != 0)
- {
- printf("could not mmap buffer\n");
- return;
- }
-
- data = (void *) mmap_arg.addr_ptr;
- buffer->image = pixman_image_create_bits(PIXMAN_x8r8g8b8,
- buffer->width, buffer->height,
- data, buffer->pitch);
- pixman_image_set_destroy_function(buffer->image, &destroy_image, buffer);
- }
- else
- pixman_image_ref(buffer->image);
-}
-
-void swc_buffer_unref_image(struct swc_buffer * buffer)
-{
- if (pixman_image_unref(buffer->image))
- buffer->image = NULL;
+ drm_intel_bo_unreference(buffer->bo);
}
diff --git a/buffer.h b/buffer.h
@@ -2,7 +2,6 @@
#define SWC_BUFFER_H 1
#include "drm.h"
-#include "intel/bo.h"
#include <stdbool.h>
#include <pixman.h>
@@ -11,10 +10,7 @@ struct swc_buffer
{
uint32_t id;
- struct intel_bo bo;
-
- /* Pixman image using the mapped buffer for use with SHM. */
- pixman_image_t * image;
+ drm_intel_bo * bo;
uint32_t width, height, pitch;
};
@@ -24,7 +20,7 @@ bool swc_buffer_initialize(struct swc_buffer * buffer, struct swc_drm * drm,
void swc_buffer_finish(struct swc_buffer * buffer, struct swc_drm * drm);
-void swc_buffer_ref_image(struct swc_buffer * buffer, struct swc_drm * drm);
+void swc_buffer_ref_image(struct swc_buffer * buffer);
void swc_buffer_unref_image(struct swc_buffer * buffer);
diff --git a/configure.ac b/configure.ac
@@ -24,6 +24,7 @@ PKG_CHECK_MODULES([wayland_server], [wayland-server])
PKG_CHECK_MODULES([udev], [libudev])
PKG_CHECK_MODULES([xkbcommon], [xkbcommon])
PKG_CHECK_MODULES([drm], [libdrm])
+PKG_CHECK_MODULES([drm_intel], [libdrm_intel])
PKG_CHECK_MODULES([gbm], [gbm])
PKG_CHECK_MODULES([egl], [egl])
PKG_CHECK_MODULES([pixman], [pixman-1])
diff --git a/drm.c b/drm.c
@@ -7,12 +7,14 @@
#include <libdrm/drm.h>
#include <xf86drm.h>
#include <libdrm/i915_drm.h>
+#include <libdrm/intel_bufmgr.h>
//#include <xf86drmMode.h>
#include <wayland-util.h>
#include "drm.h"
#include "output.h"
#include "event.h"
+#include "intel/batch.h"
static struct udev_device * find_primary_drm_device(struct udev * udev,
const char * seat)
@@ -213,10 +215,23 @@ bool swc_drm_initialize(struct swc_drm * drm, struct udev * udev,
printf("has blt: %u\n", ret);
}
+ drm->bufmgr = drm_intel_bufmgr_gem_init(drm->fd, INTEL_MAX_COMMANDS << 2);
+
+ if (!drm->bufmgr)
+ {
+ printf("could not create bufmgr\n");
+ goto error_fd;
+ }
+
+ //drm_intel_bufmgr_set_debug(drm->bufmgr, true);
+ drm_intel_bufmgr_gem_enable_fenced_relocs(drm->bufmgr);
+
udev_device_unref(drm_device);
return true;
+ error_fd:
+ close(drm->fd);
error_device:
udev_device_unref(drm_device);
error_base:
@@ -225,6 +240,7 @@ bool swc_drm_initialize(struct swc_drm * drm, struct udev * udev,
void swc_drm_finish(struct swc_drm * drm)
{
+ drm_intel_bufmgr_destroy(drm->bufmgr);
close(drm->fd);
}
diff --git a/drm.h b/drm.h
@@ -6,6 +6,7 @@
#include <libudev.h>
#include <gbm.h>
#include <wayland-server.h>
+#include <libdrm/intel_bufmgr.h>
enum swc_drm_event
{
@@ -17,6 +18,8 @@ struct swc_drm
int fd;
uint32_t id;
+ drm_intel_bufmgr * bufmgr;
+
uint32_t taken_output_ids;
struct wl_event_source * source;
diff --git a/intel/batch.c b/intel/batch.c
@@ -5,130 +5,45 @@
#include <stdio.h>
#include <xf86drm.h>
-void intel_batch_initialize(struct intel_batch * batch, int drm)
+void intel_batch_initialize(struct intel_batch * batch, drm_intel_bufmgr * bufmgr)
{
- batch->relocation_count = 0;
- batch->exec_object_count = 0;
+ batch->bufmgr = bufmgr;
batch->command_count = 0;
- batch->drm = drm;
+
+ /* Alignment (4096) is not used */
+ batch->bo = drm_intel_bo_alloc(bufmgr, "batchbuffer",
+ sizeof batch->commands, 4096);
+}
+
+void intel_batch_finalize(struct intel_batch * batch)
+{
+ drm_intel_bo_unreference(batch->bo);
}
void intel_batch_flush(struct intel_batch * batch)
{
- struct intel_bo bo;
- uint32_t index = batch->exec_object_count++;
+ if (batch->command_count == 0)
+ return;
- mi_batch_buffer_end(batch);
+ intel_batch_add_dword(batch, MI_BATCH_BUFFER_END);
/* Pad the batch buffer to the next quad-word. */
if (batch->command_count & 1)
- mi_noop(batch, false, 0);
-
- printf("command count: %u\n", batch->command_count);
-
- intel_bo_initialize(batch->drm, &bo, batch->command_count << 2);
- intel_bo_write(batch->drm, &bo, 0, batch->commands, batch->command_count << 2);
-
- printf("adding exec object with handle: %u\n", bo.handle);
-
- /* Add command buffer */
- batch->exec_objects[index] = (struct drm_i915_gem_exec_object2) {
- .handle = bo.handle,
- .relocation_count = batch->relocation_count,
- .relocs_ptr = (uint64_t) batch->relocations
- };
-
- {
- int ret;
- struct drm_i915_gem_execbuffer2 execbuffer_arg = {
- .buffers_ptr = (uint64_t) batch->exec_objects,
- .buffer_count = batch->exec_object_count,
- .batch_start_offset = 0, /* XXX: ? */
- .batch_len = batch->command_count << 2,
- .flags = I915_EXEC_RENDER
- };
+ intel_batch_add_dword(batch, MI_NOOP);
- if ((ret = drmIoctl(batch->drm, DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuffer_arg)) != 0)
- {
- printf("execbuffer failed: %u\n", -ret);
- }
- }
-
- intel_bo_finalize(batch->drm, &bo);
-
- /* Set offsets for all our execution objects (except the last one, our
- * command object). */
- for (index = 0; index < batch->exec_object_count - 1; ++index)
- *batch->offsets[index] = batch->exec_objects[index].offset;
+ drm_intel_bo_subdata(batch->bo, 0, batch->command_count << 2,
+ batch->commands);
+ int ret = drm_intel_bo_exec(batch->bo, batch->command_count << 2, NULL, 0,
+ 0);
+ //printf("ret: %d\n", ret);
+ drm_intel_gem_bo_clear_relocs(batch->bo, 0);
batch->command_count = 0;
- batch->relocation_count = 0;
- batch->exec_object_count = 0;
}
-#if 0
-uint32_t * intel_batch_alloc(struct intel_batch * batch, uint32_t size)
-{
- uint32_t * commands;
-
- if (intel_batch_space(batch) < size)
- intel_batch_flush(batch);
-
- commands = &batch->commands[batch->size];
- batch->command_count += command_count;
-
- return commands;
-}
-#endif
-
void intel_batch_ensure_space(struct intel_batch * batch, uint32_t size)
{
if (intel_batch_space(batch) < size)
intel_batch_flush(batch);
}
-uint32_t intel_batch_space(struct intel_batch * batch)
-{
- /* XXX: reserved space */
- return I915_MAX_COMMANDS - batch->command_count;
-}
-
-uint64_t intel_batch_add_relocation(struct intel_batch * batch,
- uint32_t batch_offset, struct intel_bo * bo,
- uint32_t read_domains, uint32_t write_domain)
-{
- uint32_t index = batch->relocation_count++;
-
- intel_batch_add_exec_object(batch, bo);
-
- printf("offset: %u\n", (batch->command_count + batch_offset) << 2);
- printf("current: %u\n", *((uint32_t *)(((void *) batch->commands) + ((batch->command_count + batch_offset) << 2))));
-
- batch->relocations[index] = (struct drm_i915_gem_relocation_entry) {
- .target_handle = bo->handle,
- /* XXX: delta */
- /* XXX: offset */
- .offset = (batch->command_count + batch_offset) << 2,
- .presumed_offset = bo->last_offset,
- .read_domains = read_domains,
- .write_domain = write_domain
- };
-
- /* Return our offset guess */
- return bo->last_offset;
-}
-
-void intel_batch_add_exec_object(struct intel_batch * batch, struct intel_bo * bo)
-{
- uint32_t index = batch->exec_object_count++;
-
- printf("adding exec object with handle: %u\n", bo->handle);
-
- batch->exec_objects[index] = (struct drm_i915_gem_exec_object2) {
- .handle = bo->handle
- };
-
- batch->offsets[index] = &bo->last_offset;
-}
-
diff --git a/intel/batch.h b/intel/batch.h
@@ -7,35 +7,34 @@
#include <stdint.h>
#include <stdarg.h>
-#include <libdrm/i915_drm.h>
+#include <libdrm/intel_bufmgr.h>
-#define I915_MAX_COMMANDS (1 << 15)
-#define I915_MAX_RELOCATIONS (1 << 11)
-#define I915_MAX_EXEC_OBJECTS (1 << 11)
+#define INTEL_MAX_COMMANDS (1 << 13)
struct intel_batch
{
- int drm;
-
- struct drm_i915_gem_relocation_entry relocations[I915_MAX_RELOCATIONS];
- uint64_t * offsets[I915_MAX_RELOCATIONS];
- uint32_t relocation_count;
-
- struct drm_i915_gem_exec_object2 exec_objects[I915_MAX_EXEC_OBJECTS];
- uint32_t exec_object_count;
+ drm_intel_bufmgr * bufmgr;
+ drm_intel_bo * bo;
//uint32_t header[13];
- uint32_t commands[I915_MAX_COMMANDS];
+ uint32_t commands[INTEL_MAX_COMMANDS];
uint32_t command_count;
};
-void intel_batch_initialize(struct intel_batch * batch, int drm);
+void intel_batch_initialize(struct intel_batch * batch, drm_intel_bufmgr * bufmgr);
+
+void intel_batch_finalize(struct intel_batch * batch);
void intel_batch_flush(struct intel_batch * batch);
void intel_batch_ensure_space(struct intel_batch * batch, uint32_t size);
-uint32_t intel_batch_space(struct intel_batch * batch);
+static inline uint32_t intel_batch_space(struct intel_batch * batch)
+{
+ /* XXX: reserved space */
+ return INTEL_MAX_COMMANDS - batch->command_count;
+}
+
static inline void intel_batch_add_dword(struct intel_batch * batch,
uint32_t dword)
@@ -52,11 +51,12 @@ static inline void intel_batch_add_dwords(struct intel_batch * batch, uint32_t c
va_end(dwords);
}
-uint64_t intel_batch_add_relocation(struct intel_batch * batch,
- uint32_t batch_offset, struct intel_bo * bo,
- uint32_t read_domains, uint32_t write_domain);
-
-void intel_batch_add_exec_object(struct intel_batch * batch, struct intel_bo * bo);
+static inline uint32_t intel_batch_offset(struct intel_batch * batch,
+ uint32_t command_index)
+{
+ //printf("intel_batch_offset(4): %u\n", (batch->command_count + command_index) << 2);
+ return (batch->command_count + command_index) << 2;
+}
#endif
diff --git a/intel/blt.h b/intel/blt.h
@@ -1,16 +1,54 @@
#ifndef SWC_I915_BLT_H
#define SWC_I915_BLT_H 1
-#include "intel/bo.h"
-#include "intel/batch.h"
+#include "batch.h"
-#define BR00_CLIENT_2D 0x2
+#include <libdrm/i915_drm.h>
-#define BR00_OPCODE_XY_COLOR_BLT 0x50
-#define BR00_OPCODE_XY_SRC_COPY_BLT 0x53
+#define COMMAND_TYPE_2D 0x2
-#define BR00_32BPP_BYTE_MASK_ALPHA (1 << 1)
-#define BR00_32BPP_BYTE_MASK_COLOR (1 << 2)
+#define BLT_OPCODE_XY_COLOR_BLT 0x50
+#define BLT_OPCODE_XY_SRC_COPY_BLT 0x53
+
+#if 0
+/* BR00 */
+#define BLT_OP(opcode, dword_length) ( \
+ COMMAND_TYPE_2D << 29 /* 31:29 */ \
+ | opcode << 23 /* 28:23 */ \
+ | dword_length /* 7:0 */ \
+)
+
+#define BR00_32BPP_WRITE_ALPHA (1 << 21) /* 21 */
+#define BR00_32BPP_WRITE_RGB (1 << 20) /* 20 */
+#define BR00_SRC_TILING_ENABLE (1 << 15) /* 15 */
+#define BR00_DST_TILING_ENABLE (1 << 11) /* 11 */
+
+#define BLT_ADDRESS(address) (address)
+#define BLT_COORD(x, y) (y << 16 | x)
+
+#define BR09(address) BLT_ADDRESS(address)
+#define BR11(source_pitch) (source_pitch)
+#define BR12(address) BLT_ADDRESS(address)
+
+/* BR13 */
+#define BR13_COLOR_DEPTH(depth) (depth << 24) /* 25:24 */
+#define BR13_COLOR_DEPTH_8BIT BR13_COLOR_DEPTH(0x0)
+#define BR13_COLOR_DEPTH_16BIT_565 BR13_COLOR_DEPTH(0x1)
+#define BR13_COLOR_DEPTH_16BIT_1555 BR13_COLOR_DEPTH(0x2)
+#define BR13_COLOR_DEPTH_32BIT BR13_COLOR_DEPTH(0x3)
+
+#define BR13_RASTER_OPERATION(op) (op << 16) /* 23:16 */
+#define BR13_RASTER_OPERATION_SOURCE BR13_RASTER_OPERATION(0xcc)
+#define BR13_RASTER_OPERATION_PATTERN BR13_RASTER_OPERATION(0xf0)
+
+#define BR16(color) (color)
+#define BR22(x, y) BLT_COORD(x, y)
+#define BR23(x, y) BLT_COORD(x, y)
+#define BR26(x, y) BLT_COORD(x, y)
+#endif
+
+#define BR00_32BPP_BYTE_MASK_ALPHA (1 << 0)
+#define BR00_32BPP_BYTE_MASK_COLOR (1 << 1)
static inline uint32_t br00(uint8_t client, uint8_t opcode,
uint8_t mask_32bpp,
@@ -100,78 +138,69 @@ static inline uint32_t br26(uint16_t source_y1, uint16_t source_x1)
};
static inline void xy_src_copy_blt(struct intel_batch * batch,
- struct intel_bo * src, uint16_t src_pitch,
+ drm_intel_bo * src, uint16_t src_pitch,
uint16_t src_x, uint16_t src_y,
- struct intel_bo * dst, uint16_t dst_pitch,
+ drm_intel_bo * dst, uint16_t dst_pitch,
uint16_t dst_x, uint16_t dst_y,
uint16_t width, uint16_t height)
{
-#if 0
- intel_batch_add_dword(batch,
- uint32_t * commands = intel_batch_alloc(batch, 8);
- commands = (uint32_t *)
- *commands++ = br00(BR00_CLIENT_2D, BR00_OPCODE_XY_SRC_COPY_BLT,
- BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
- false, false, 6);
- *commands++ = br13(false, BR13_COLOR_DEPTH_32BIT,
- BR13_RASTER_OPERATION_SRC,
- dst_pitch);
- *commands++ = br22(dst_y, dst_x);
- *commands++ = br23(dst_y + height, dst_x + width);
- *commands++ = br09(0); /* XXX: dst address */
- *commands++ = br26(src_y, src_x);
- *commands++ = br11(src_pitch);
- *commands++ = br12(0); /* XXX: src address */
-#endif
-
- uint32_t dst_address, src_address;
+ uint32_t src_tiling_mode, dst_tiling_mode, swizzle;
intel_batch_ensure_space(batch, 8);
- dst_address = intel_batch_add_relocation(batch, 4, dst,
- I915_GEM_DOMAIN_RENDER,
- I915_GEM_DOMAIN_RENDER);
- src_address = intel_batch_add_relocation(batch, 7, src,
- I915_GEM_DOMAIN_RENDER, 0);
+ drm_intel_bo_get_tiling(dst, &dst_tiling_mode, &swizzle);
+ drm_intel_bo_get_tiling(src, &src_tiling_mode, &swizzle);
+
+ //printf("src_tiling: %u, dst_tiling: %u\n", src_tiling_mode, dst_tiling_mode);
+
+ drm_intel_bo_emit_reloc_fence(batch->bo, intel_batch_offset(batch, 4), dst, 0,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER);
+ drm_intel_bo_emit_reloc_fence(batch->bo, intel_batch_offset(batch, 7), src, 0,
+ I915_GEM_DOMAIN_RENDER, 0);
intel_batch_add_dwords(batch, 8,
- br00(BR00_CLIENT_2D, BR00_OPCODE_XY_SRC_COPY_BLT,
+ br00(COMMAND_TYPE_2D, BLT_OPCODE_XY_SRC_COPY_BLT,
BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
- false, false, 6),
+ src_tiling_mode != I915_TILING_NONE,
+ dst_tiling_mode != I915_TILING_NONE, 6),
br13(false, BR13_COLOR_DEPTH_32BIT, BR13_RASTER_OPERATION_SOURCE,
- dst_pitch),
+ dst_pitch >> 2),
br22(dst_y, dst_x),
br23(dst_y + height, dst_x + width),
- br09(dst_address),
+ br09(dst->offset),
br26(src_y, src_x),
- br11(src_pitch),
- br12(src_address)
+ br11(src_pitch >> 2),
+ br12(src->offset)
);
}
static inline void xy_color_blt(struct intel_batch * batch,
- struct intel_bo * dst, uint16_t dst_pitch,
- uint16_t dst_x, uint16_t dst_y,
- uint16_t width, uint16_t height,
+ drm_intel_bo * dst, uint16_t dst_pitch,
+ uint16_t dst_x1, uint16_t dst_y1,
+ uint16_t dst_x2, uint16_t dst_y2,
uint32_t color)
{
- uint32_t dst_address;
+ uint32_t tiling_mode, swizzle_mode;
intel_batch_ensure_space(batch, 6);
- dst_address = intel_batch_add_relocation(batch, 4, dst,
- I915_GEM_DOMAIN_RENDER,
- I915_GEM_DOMAIN_RENDER);
+ drm_intel_bo_get_tiling(dst, &tiling_mode, &swizzle_mode);
+
+ //printf("tiling: %u, swizzle: %u\n", tiling_mode, swizzle_mode);
+ //printf("pitch: %u\n", dst_pitch);
+
+ drm_intel_bo_emit_reloc_fence(batch->bo, intel_batch_offset(batch, 4), dst, 0,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER);
intel_batch_add_dwords(batch, 6,
- br00(BR00_CLIENT_2D, BR00_OPCODE_XY_COLOR_BLT,
+ br00(COMMAND_TYPE_2D, BLT_OPCODE_XY_COLOR_BLT,
BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
- false, false, 4),
+ false, tiling_mode != I915_TILING_NONE, 4),
br13(false, BR13_COLOR_DEPTH_32BIT, BR13_RASTER_OPERATION_PATTERN,
- dst_pitch),
- br22(dst_y, dst_x),
- br23(dst_y + height, dst_x + width),
- br09(dst_address),
+ dst_pitch >> 2),
+ br22(dst_y1, dst_x1),
+ br23(dst_y2, dst_x2),
+ br09(dst->offset),
br16(color)
);
}
diff --git a/intel/mi.h b/intel/mi.h
@@ -8,90 +8,25 @@
#define COMMAND_TYPE_MI 0x0
-#define MI_OPCODE_NOOP 0x00
-#define MI_OPCODE_FLUSH 0x04
-#define MI_OPCODE_BATCH_BUFFER_END 0x0A
-#define MI_OPCODE_FLUSH_DW 0x04
-#define MI_OPCODE_BATCH_BUFFER_START 0x31
-
-static inline void mi_noop(struct intel_batch * batch,
- bool identification_number_write_enable,
- uint32_t identification_number)
-{
- intel_batch_add_dword(batch,
- COMMAND_TYPE_MI << 29 /* 31:29 */
- | MI_OPCODE_NOOP << 23 /* 28:23 */
- | identification_number_write_enable << 22 /* 22 */
- | identification_number << 0 /* 21:0 */
- );
-}
-
-static inline void mi_flush(struct intel_batch * batch,
- bool protected_memory_enable,
- bool indirect_state_pointers_disable,
- bool generic_media_state_clear,
- bool global_snapshot_count_reset,
- bool render_cache_flush_inhibit,
- bool state_cache_invalidate)
-{
- intel_batch_add_dword(batch,
- COMMAND_TYPE_MI << 29 /* 31:29 */
- | MI_OPCODE_FLUSH << 23 /* 28:23 */
- /* 22:7 */
- | protected_memory_enable << 6 /* 6 */
- | indirect_state_pointers_disable << 5 /* 5 */
- | generic_media_state_clear << 4 /* 4 */
- | global_snapshot_count_reset << 3 /* 3 */
- | render_cache_flush_inhibit << 2 /* 2 */
- | state_cache_invalidate /* 1 */
- /* 0 */
- );
-}
-
-static inline void mi_flush_dw(struct intel_batch * batch)
-{
- intel_batch_add_dwords(batch, 4,
- COMMAND_TYPE_MI << 29
- | MI_OPCODE_FLUSH_DW << 23
- | 2
- ,
- 0,
- 0,
- 0
- );
-}
-
-static inline void mi_batch_buffer_end(struct intel_batch * batch)
-{
- /* XXX: semaphore data dword / semaphore address */
- intel_batch_add_dword(batch,
- COMMAND_TYPE_MI << 29 /* 31:29 */
- | MI_OPCODE_BATCH_BUFFER_END << 23 /* 28:23 */
- /* 22:0 */
- );
-}
-
-static inline void mi_batch_buffer_start(struct intel_batch * batch,
- bool encrypted_memory_enable,
- bool clear_command_buffer_enable,
- bool buffer_non_secure,
- uint32_t buffer_address)
-{
- intel_batch_ensure_space(batch, 2);
-
- intel_batch_add_dwords(batch, 2,
- COMMAND_TYPE_MI << 29 /* 31:29 */
- | MI_OPCODE_BATCH_BUFFER_START << 23 /* 28:23 */
- /* 22:13 */
- | encrypted_memory_enable << 12 /* 12 */
- | clear_command_buffer_enable << 11 /* 11 */
- /* 10:9 */
- | buffer_non_secure << 8 /* 8 */
- | 0 /* 7:0 */
- ,
- buffer_address
- );
-}
+#define MI_OP(opcode) ( \
+ COMMAND_TYPE_MI << 29 /* 31:29 */ \
+ | opcode << 23 /* 28:23 */ \
+)
+
+#define MI_NOOP MI_OP(0x00)
+#define MI_FLUSH MI_OP(0x04)
+#define MI_BATCH_BUFFER_END MI_OP(0x0A)
+
+/* MI_NOOP */
+#define MI_NOOP_IDENTIFICATION_NUMBER(number) (1 << 22 | number)
+
+/* MI_FLUSH */
+#define MI_FLUSH_ENABLE_PROTECTED_MEMORY (1 << 6)
+#define MI_FLUSH_DISABLE_INDIRECT_STATE_POINTERS (1 << 5)
+#define MI_FLUSH_CLEAR_GENERIC_MEDIA_STATE (1 << 3)
+#define MI_FLUSH_RESET_GLOBAL_SNAPSHOT_COUNT (1 << 3)
+#define MI_FLUSH_INHIBIT_RENDER_CACHE_FLUSH (1 << 2)
+#define MI_FLUSH_INVALIDATE_STATE_INSTRUCTION_CACHE (1 << 2)
#endif
diff --git a/output.c b/output.c
@@ -110,7 +110,7 @@ bool swc_output_initialize(struct swc_output * output, struct swc_drm * drm,
uint32_t line[output->width];
uint32_t x, y;
struct drm_i915_gem_pwrite arg = {
- .handle = output->buffers[0].bo.handle,
+ .handle = output->buffers[0].bo->handle,
.size = sizeof line,
.data_ptr = (uint64_t) line
};
@@ -127,7 +127,7 @@ bool swc_output_initialize(struct swc_output * output, struct swc_drm * drm,
color = 0x00333399;
arg.offset = 0;
- arg.handle = output->buffers[1].bo.handle;
+ arg.handle = output->buffers[1].bo->handle;
for (x = 0; x < output->width; ++x)
line[x] = color;
diff --git a/renderer.c b/renderer.c
@@ -66,11 +66,16 @@ static void repaint_surface_for_output(struct swc_renderer * renderer,
if (wl_buffer_is_shm(surface->state.buffer))
{
+ pixman_image_t * buffer_image;
+
printf("repainting shm surface\n");
+ buffer_image = pixman_image_create_bits_no_clear
+ (PIXMAN_x8r8g8b8, back_buffer->width, back_buffer->height,
+ back_buffer->bo->virtual, back_buffer->pitch);
+
pixman_image_composite32(PIXMAN_OP_SRC,
surface->renderer_state.shm.image, NULL,
- back_buffer->image,
- 0, 0, 0, 0, 0, 0,
+ buffer_image, 0, 0, 0, 0, 0, 0,
surface->geometry.width,
surface->geometry.height);
}
@@ -92,13 +97,14 @@ bool swc_renderer_initialize(struct swc_renderer * renderer,
{
renderer->drm = drm;
- intel_batch_initialize(&renderer->batch, drm->fd);
+ intel_batch_initialize(&renderer->batch, drm->bufmgr);
return true;
}
void swc_renderer_finalize(struct swc_renderer * renderer)
{
+ intel_batch_finalize(&renderer->batch);
}
void swc_renderer_repaint_output(struct swc_renderer * renderer,
@@ -117,7 +123,7 @@ void swc_renderer_repaint_output(struct swc_renderer * renderer,
}
}
- xy_color_blt(&renderer->batch, &swc_output_get_back_buffer(output)->bo,
+ xy_color_blt(&renderer->batch, swc_output_get_back_buffer(output)->bo,
swc_output_get_back_buffer(output)->pitch, 0, 0, 500, 500,
0xffffffff);
@@ -147,8 +153,8 @@ void swc_renderer_attach(struct swc_renderer * renderer,
{
if (surface->output_mask & (1 << output->id))
{
- swc_buffer_ref_image(&output->buffers[0], renderer->drm);
- swc_buffer_ref_image(&output->buffers[1], renderer->drm);
+ swc_buffer_ref_image(&output->buffers[0]);
+ swc_buffer_ref_image(&output->buffers[1]);
}
}
}
@@ -159,9 +165,9 @@ void swc_renderer_attach(struct swc_renderer * renderer,
struct intel_region * region = image->region;
drm_intel_bo * bo = region->bo;
- surface->renderer_state.drm.bo = (struct intel_bo) {
- .handle = bo->handle
- };
+ surface->renderer_state.drm.bo
+ = drm_intel_bo_gem_create_from_name(renderer->drm->bufmgr,
+ "surface", region->name);
surface->renderer_state.drm.pitch = region->pitch;
diff --git a/surface_state.h b/surface_state.h
@@ -1,7 +1,7 @@
#ifndef SWC_SURFACE_STATE_H
#define SWC_SURFACE_STATE_H 1
-#include "intel/bo.h"
+#include <libdrm/intel_bufmgr.h>
#include <wayland-server.h>
#include <pixman.h>
@@ -14,7 +14,7 @@ union swc_renderer_surface_state
} shm;
struct
{
- struct intel_bo bo;
+ drm_intel_bo * bo;
uint32_t pitch;
} drm;
};
