swc

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commit a6aec7ea06623e533b4dd33b1c1dca1c5dc17d16
parent aa380ec56f3a11ef4657bb798ff1857e93982ac3
Author: Michael Forney <mforney@mforney.org>
Date:   Sun, 30 Jun 2013 21:28:13 -0700

Style

Diffstat:
Mintel/batch.c | 3++-
Mintel/batch.h | 11+++++------
Mintel/blt.h | 59++++++++++-------------------------------------------------
3 files changed, 17 insertions(+), 56 deletions(-)

diff --git a/intel/batch.c b/intel/batch.c @@ -4,7 +4,8 @@ #include <stdio.h> #include <xf86drm.h> -void intel_batch_initialize(struct intel_batch * batch, drm_intel_bufmgr * bufmgr) +void intel_batch_initialize(struct intel_batch * batch, + drm_intel_bufmgr * bufmgr) { batch->bufmgr = bufmgr; batch->command_count = 0; diff --git a/intel/batch.h b/intel/batch.h @@ -5,7 +5,7 @@ #include <stdint.h> #include <stdarg.h> -#include <libdrm/intel_bufmgr.h> +#include <intel_bufmgr.h> #define INTEL_MAX_COMMANDS (1 << 13) @@ -14,7 +14,6 @@ struct intel_batch drm_intel_bufmgr * bufmgr; drm_intel_bo * bo; - //uint32_t header[13]; uint32_t commands[INTEL_MAX_COMMANDS]; uint32_t command_count; }; @@ -35,24 +34,24 @@ static inline uint32_t intel_batch_space(struct intel_batch * batch) static inline void intel_batch_add_dword(struct intel_batch * batch, - uint32_t dword) + uint32_t dword) { batch->commands[batch->command_count++] = dword; } -static inline void intel_batch_add_dwords(struct intel_batch * batch, uint32_t count, ...) +static inline void intel_batch_add_dwords(struct intel_batch * batch, + uint32_t count, ...) { va_list dwords; va_start(dwords, count); while (count--) - intel_batch_add_dword(batch, va_arg(dwords, int)); + intel_batch_add_dword(batch, va_arg(dwords, uint32_t)); va_end(dwords); } static inline uint32_t intel_batch_offset(struct intel_batch * batch, uint32_t command_index) { - //printf("intel_batch_offset(4): %u\n", (batch->command_count + command_index) << 2); return (batch->command_count + command_index) << 2; } diff --git a/intel/blt.h b/intel/blt.h @@ -3,50 +3,13 @@ #include "batch.h" -#include <libdrm/i915_drm.h> +#include <i915_drm.h> #define COMMAND_TYPE_2D 0x2 #define BLT_OPCODE_XY_COLOR_BLT 0x50 #define BLT_OPCODE_XY_SRC_COPY_BLT 0x53 -#if 0 -/* BR00 */ -#define BLT_OP(opcode, dword_length) ( \ - COMMAND_TYPE_2D << 29 /* 31:29 */ \ - | opcode << 23 /* 28:23 */ \ - | dword_length /* 7:0 */ \ -) - -#define BR00_32BPP_WRITE_ALPHA (1 << 21) /* 21 */ -#define BR00_32BPP_WRITE_RGB (1 << 20) /* 20 */ -#define BR00_SRC_TILING_ENABLE (1 << 15) /* 15 */ -#define BR00_DST_TILING_ENABLE (1 << 11) /* 11 */ - -#define BLT_ADDRESS(address) (address) -#define BLT_COORD(x, y) (y << 16 | x) - -#define BR09(address) BLT_ADDRESS(address) -#define BR11(source_pitch) (source_pitch) -#define BR12(address) BLT_ADDRESS(address) - -/* BR13 */ -#define BR13_COLOR_DEPTH(depth) (depth << 24) /* 25:24 */ -#define BR13_COLOR_DEPTH_8BIT BR13_COLOR_DEPTH(0x0) -#define BR13_COLOR_DEPTH_16BIT_565 BR13_COLOR_DEPTH(0x1) -#define BR13_COLOR_DEPTH_16BIT_1555 BR13_COLOR_DEPTH(0x2) -#define BR13_COLOR_DEPTH_32BIT BR13_COLOR_DEPTH(0x3) - -#define BR13_RASTER_OPERATION(op) (op << 16) /* 23:16 */ -#define BR13_RASTER_OPERATION_SOURCE BR13_RASTER_OPERATION(0xcc) -#define BR13_RASTER_OPERATION_PATTERN BR13_RASTER_OPERATION(0xf0) - -#define BR16(color) (color) -#define BR22(x, y) BLT_COORD(x, y) -#define BR23(x, y) BLT_COORD(x, y) -#define BR26(x, y) BLT_COORD(x, y) -#endif - #define BR00_32BPP_BYTE_MASK_ALPHA (1 << 0) #define BR00_32BPP_BYTE_MASK_COLOR (1 << 1) @@ -151,12 +114,12 @@ static inline void xy_src_copy_blt(struct intel_batch * batch, drm_intel_bo_get_tiling(dst, &dst_tiling_mode, &swizzle); drm_intel_bo_get_tiling(src, &src_tiling_mode, &swizzle); - //printf("src_tiling: %u, dst_tiling: %u\n", src_tiling_mode, dst_tiling_mode); - - drm_intel_bo_emit_reloc_fence(batch->bo, intel_batch_offset(batch, 4), dst, 0, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); - drm_intel_bo_emit_reloc_fence(batch->bo, intel_batch_offset(batch, 7), src, 0, - I915_GEM_DOMAIN_RENDER, 0); + drm_intel_bo_emit_reloc_fence + (batch->bo, intel_batch_offset(batch, 4), dst, 0, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); + drm_intel_bo_emit_reloc_fence + (batch->bo, intel_batch_offset(batch, 7), src, 0, + I915_GEM_DOMAIN_RENDER, 0); intel_batch_add_dwords(batch, 8, br00(COMMAND_TYPE_2D, BLT_OPCODE_XY_SRC_COPY_BLT, @@ -186,11 +149,9 @@ static inline void xy_color_blt(struct intel_batch * batch, drm_intel_bo_get_tiling(dst, &tiling_mode, &swizzle_mode); - //printf("tiling: %u, swizzle: %u\n", tiling_mode, swizzle_mode); - //printf("pitch: %u\n", dst_pitch); - - drm_intel_bo_emit_reloc_fence(batch->bo, intel_batch_offset(batch, 4), dst, 0, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); + drm_intel_bo_emit_reloc_fence + (batch->bo, intel_batch_offset(batch, 4), dst, 0, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); intel_batch_add_dwords(batch, 6, br00(COMMAND_TYPE_2D, BLT_OPCODE_XY_COLOR_BLT,